In recent years, non-volatile memories, which are semiconductor memory devices which can retain data even when the power supply is turned off, have come into wide use. In flash memory a popular type of non-volatile memory, a transistor constituting a memory cell has either one of a floating gate or an insulating film, which is called a charge storage layer. The charge storage layer accumulates electrical charges, thereby storing data. As a flash memory provided with an insulating film as the charge storage layer, a silicon-oxide-nitride-oxide-silicon (SONOS) flash memory, accumulates electrical charges in a nitride film in an oxide-nitride-oxide (ONO) film.
Examples of SONOS flash memories include virtual ground flash memory, which activates a source region and a drain region by switching them so as to provide two charge storage regions in a charge storage layer of a single memory cell. In these devices, a single memory cell can store two-bit information. Such a virtual ground flash memory needs to have a long channel length to some extent to prevent complementary bit disturb (CBD), which is a interference phenomenon of that involves the accumulation of electrical charges in the two charge storage regions. Consequently, miniaturization of a memory cell can be problematic.
In view of this, flash memories having a charge storage layer on opposing side surfaces of a trench formed in a semiconductor substrate have been developed (see, for example, Japanese Patent Application Publication Nos. JP-A-2001-274366 and JP-A-2005-136426). Since the channel is provided along the side walls of the trench, a sufficient channel length can be secured, which can prevent CBD. In particular, two charge storage regions can be provided in each charge storage layer on opposing side surfaces of a trench, if a diffusion region is provided to the bottom surface and upper sides of the trench. In other words, a single trench can be provided with four charge storage regions, thereby storing four-bit information.
A NAND flash memory includes a shallow trench isolation (STI) region as well as the above-described trench. Further, to provide four charge storage regions in a single trench, word lines separated from each other need to be provided on opposing side surfaces of the trench. The manufacturing process, therefore, can be complicated, and it can be difficult to achieve a miniaturization of memory cells.